This invention relates to integrators.
Integrators have high linearity, wide bandwidth, and low noise characteristics. Integrators, however, require a reset interval to discharge the capacitor in the integrator""s feedback loop which results in significant xe2x80x9cdeadxe2x80x9d times in measurements and harmful transients on the integrator""s input. Additionally, the rapid discharge interval aggravates the problem of dielectric absorption, thereby undermining the lower limit of instrument precision.
Referring to FIG. 1, an integrator 10 includes a feedback loop having a switch 12 in parallel with a feedback capacitor 14. The switch 12 allows the feedback capacitor 14 to discharge when the switch 12 is closed. Placing one or more strings of series resistors and capacitors in parallel with the feedback capacitor 14 with or without the switch 12 reduces at least some of the harmful effects of this discharge. However, even in some arrangements having multiple capacitors, dielectric absorption is still a problem since the charge in the series capacitors is redistributed with the feedback capacitor 14.
The invention overcomes these unwanted effects of integrator reset by providing integrator circuit topologies that enable continuous integration, without the need for reset of the integrator circuit. One such integrator circuit includes a first integrator and a second integrator, each of the two integrators having a non-inverting terminal. Each of the non-inverting terminals is connected to an input node to alternately receive an input current for continuous integrator circuit integration without integrator circuit reset.
In further configurations, the inverting terminal of the second integrator can be connected to an inverting terminal of the first integrator. The non-inverting terminal of the second integrator can be connected to an output of the first integrator through a first capacitor, and the output of the second integrator can be connected to the non-inverting terminal of the first integrator through a second capacitor. In operation, the first integrator and the second integrator have voltages on respective ones of the inverting and non-inverting terminals that are substantially equal, and the two integrators produce output voltages that are complementary.
In a further integrator circuit provided by the invention, at least one integrator is provided, having an input for receiving an input current. A plurality of integrator feedback capacitors are provided, with each capacitor being connected to alternately charge and discharge, based on the integrator input current. This cooperative charging and discharging enables continuous integrator circuit integration without integrator circuit reset.
These integrator circuit topologies can be employed in a wide variety of applications in which low signal level, precise measurements are required. For example, in one biological application, the first integrator and the second integrator can be operated to each introduce an output voltage into a chemical bath on either side of a biological membrane. In this application, the integrator circuit is configured to detect fluctuations of ion channels. In another application, e.g., the integrator circuit can be configured for charge detection.
These applications are particularly well-served by the integrator circuit of the invention in its elimination of a need for rapid discharging of feedback capacitors during operation. The integrator circuit of the invention can perpetually integrate incoming current signals, such as low-level transducer signals, to produce an output of a continuous flow of two complementary voltages. This perpetual integration eliminates xe2x80x9cdead timexe2x80x9d and input transients, compensates for charge injection at the integrator input, and reduces the harmful effects of dielectric absorption. At the same time, the integrator circuit maintains a high degree of operational linearity, produces a low level of noise, and can accommodate a wide bandwidth of input signals.
Other features and advantages of the invention are provided in the following detailed description and the accompanying drawings, and in the claims.